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(parent: fe3a0b1) | patch
x86emul: support VAES insns
authorJan Beulich <jbeulich@suse.com>
Wed, 17 Jul 2019 13:41:58 +0000 (15:41 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 17 Jul 2019 13:41:58 +0000 (15:41 +0200)
commit86ab55603e49002d33ccba69ce74146342c67844
treebb929d8a74ec986acb63691e280c6f08e00b1217tree | snapshot
parentfe3a0b15ef9c17b8788fb5cda3fd6d98d5f6e448commit | diff
x86emul: support VAES insns

As to the feature dependency adjustment, just like for VPCLMULQDQ while
strictly speaking AVX is a sufficient prereq (to have YMM registers),
256-bit vectors of integers have got fully introduced with AVX2 only.

A new test case (also covering AESNI) will be added to the harness by a
subsequent patch.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citirx.com>
tools/tests/x86_emulator/evex-disp8.c diff | blob | history
tools/tests/x86_emulator/x86-emulate.h diff | blob | history
xen/arch/x86/x86_emulate/x86_emulate.c diff | blob | history
xen/include/asm-x86/cpufeature.h diff | blob | history
xen/include/public/arch-x86/cpufeatureset.h diff | blob | history
xen/tools/gen-cpuid.py diff | blob | history
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